81101A 81104A

81101A Pulse Generator, 50 MHz
	Single-channel pulse generator 50 MHz, 10 V from 50 Ohm into 50 Ohm Triggerable / PLL operation selectable Pulse / burst modes selectable Variable transition times BNC outputs, single-ended

81104A Pulse/Pattern Generator, 80 MHz
	Single-/dual-channel pulse/pattern generator. 80 MHz, 10 V from 50 Ohm into 50 Ohm Triggerable / PLL operation selectable Pulse / burst / pattern modes selectable Variable transition times

Specifications Specifications describe the instrument’s warranted performance. Non-warranted values are described as typical. All specifications apply after a 30-minute warm-up phase with 50 Ω source/load resistance and separate channels. All specifications are valid from 0°C to 55°C ambient temperature.
Timing Characteristics Measured at 50% amplitude at fastest transitions, in continuous mode, and 50 Ω source impedance.
Mainframe	81101A
Frequency range	1 mHz to 50 MHz
Timing resolution	3.5 digits, 5 ps best case
RMS jitter (period, width, delay)
With PLL	± 0.001% ± 15 ps
With VCO ^[1]	± 0.01% ± 15 ps
Period range	20 ns to 999.5 s
Accuracy with PLL	± 0.01% (± 5%)^[1]
Width range	10.0 ns to (period - 10.0 ns)
Accuracy	± 5% ± 250 ps^[2]
Additional variable delay range	0 ns to (period - 20 ns)
Accuracy ^[3]	± 5% ± 1 ns
Double pulse delay range	(width + 10.0 ns) to (period - width - 10.0 ns)
Accuracy	± 5% ± 500 ps
Transition time range (10/90)	5 ns to 200 ms variable
Accuracy	± 10 % ± 200 ps
Linearity	3% typ. for transitions > 100 ns

[1] If the startable oscillator (VCO) is used (PLL not active).
[2] Changing of amplitude may add 0.5 ns.
[3] Width accuracy specification is valid up to 5.5 Vpp amplitude. Above this amplitude, the width will typically increase up to 300ps.

Burst Count:	2 to 65536 (single or double pulses).
Delay:	Delay, phase, or % of period.
Double pulse delay:	Double pulse and delay are mutually exclusive.
Duty cycle:	Set between 0.1% and 95% (subject to width limits; 99.9% with over programming).
Transition times:	These can be entered as leading/trailing edge or % of width. Leading and trailing edges are independent within one of the following overlapping segments (1:20 ratio): 5 ns - 20 ns, 10 ns - 200 ns, 100 ns - 2 µs, 1µs - 20 µs, 10 µs - 200 µs, 100 µs - 2 ms, 1 ms - 20 ms, 10 ms - 200 ms.
Output timing fidelity:	Period, delay, and width are continuously variable without any output glitches or dropouts.
Repeatability:	Is typically four times better than accuracy.